Formal Verification of Square Root Algorithms

Formal Verification of Square Root Algorithms

We discuss the formal verification of some low-level mathematical software for the Intel Itanium architecture. A number of important algorithms have been proven correct using the HOL Light theorem prover. After briefly surveying some of our formal verification work, we discuss in more detail the verification of a square root algorithm, which helps to illustrate why some features of HOL Light,...

Formal Verification of Divide and Square Root Algorithms using Series Calculation

Design and formal verification of DZMBE+

In this paper, a new broadcast encryption scheme is presented based on threshold secret sharing and secure multiparty computation. This scheme is maintained to be dynamic in that a broadcaster can broadcast a message to any of the dynamic groups of users in the system and it is also fair in the sense that no cheater is able to gain an unfair advantage over other users. Another important feature...

Implementation of Different Square Root Algorithms

This paper presents the operation and the implementation of novel fixed point square root algorithms with an input range of 0 to 1 into CMOS. These algorithms are referred to as non-restoring and restoring algorithm and were compared with a square root implementation into a lookup table (LUT). The power consumption, the area consumption and the propagation delay were investigated and the result...

Formal Verification of IA-64 Division Algorithms

The IA-64 architecture defers floating point and integer division to software. To ensure correctness and maximum efficiency, Intel provides a number of recommended algorithms which can be called as subroutines or inlined by compilers and assembly language programmers. All these algorithms have been subjected to formal verification using the HOL Light theorem prover. As well as improving our lev...